Module 1
CPU, I/P unit, O/P unit, Memory, Bus organizations, ALU, Control Unit, Registers, Execution of an instruction, Main memory, Addressing, Memory Address Register – Memory Data Register – Memory systems – Architecture of 8085- Pin Diagram – Registers.
CPU, I/P unit, O/P unit, Memory, Bus organizations, ALU, Control Unit, Registers, Execution of an instruction, Main memory, Addressing, Memory Address Register – Memory Data Register – Memory systems – Architecture of 8085- Pin Diagram – Registers.
Module 2
Instruction set of 8085 – Instruction Types – Arithmetic – Logic data transfer, Branch, Stack, I/O and Machine Control instructions – Addressing Modes – Direct and Indirect Addressing – Immediate Addressing – Implicit Addressing.
Instruction set of 8085 – Instruction Types – Arithmetic – Logic data transfer, Branch, Stack, I/O and Machine Control instructions – Addressing Modes – Direct and Indirect Addressing – Immediate Addressing – Implicit Addressing.
Module 3
Subroutines – Stack Operations – Call Return sequence- Programming Examples.
CPU of a microcomputer – timing and control unit – The fetch operation – Machine cycle and T- State instruction and data flow.
Subroutines – Stack Operations – Call Return sequence- Programming Examples.
CPU of a microcomputer – timing and control unit – The fetch operation – Machine cycle and T- State instruction and data flow.
Module 4
Interrupts of 8085 – Hardware & Software Interrupts – Enabling, Disabling and masking of interrupts – Polling – HALT & HOLD states – Programmable interrupt controller – 8259
Interrupts of 8085 – Hardware & Software Interrupts – Enabling, Disabling and masking of interrupts – Polling – HALT & HOLD states – Programmable interrupt controller – 8259
Module 5
Interfacing Memory and I/O devices – Address space partitioning – Memory mapped I/O – I/O mapped I/O – Memory interfacing – interfacing EPROM & RAM to 8085 – Data transfer schemes – Programmed data transfer – synchronous and asynchronous transfer – interrupt driven data transfer – DMA data transfer – DMA controller – 8257 – I/O channels.
Interfacing Memory and I/O devices – Address space partitioning – Memory mapped I/O – I/O mapped I/O – Memory interfacing – interfacing EPROM & RAM to 8085 – Data transfer schemes – Programmed data transfer – synchronous and asynchronous transfer – interrupt driven data transfer – DMA data transfer – DMA controller – 8257 – I/O channels.
References
1. Microprocessor Architecture, Programming and Applications with the 8085 – Gaonkar, New Age International
2. Microprocessors, interfacing and Applications – Renu Singh, B. P. Singh, New Age International
3. Microprocessors – B. Ram
4. Introduction to Microprocessors Systems – Adithya P. Mathur, PHI
5. Microprocessors Peripherals and Applications – Gilmore
2. Microprocessors, interfacing and Applications – Renu Singh, B. P. Singh, New Age International
3. Microprocessors – B. Ram
4. Introduction to Microprocessors Systems – Adithya P. Mathur, PHI
5. Microprocessors Peripherals and Applications – Gilmore
mg university b.tech syllabus s3 computer science engg S3