Module 1
Basic structure of computer hardware and software- addressing methods and machine programming sequencing- different addressing modes- instruction sets- computer arithmetic logic design- fast adders- multiplication- Booth’s algorithm- fast multiplication- integer division- floating point numbers.
Basic structure of computer hardware and software- addressing methods and machine programming sequencing- different addressing modes- instruction sets- computer arithmetic logic design- fast adders- multiplication- Booth’s algorithm- fast multiplication- integer division- floating point numbers.
Module 2
Control unit- instruction execution cycle- sequencing of control signals- hardwired control- PLAs- micro programmed controls- control signals- micro instructions – Micro program sequencing- branch address modification- pre fetching of micro instructions.
Control unit- instruction execution cycle- sequencing of control signals- hardwired control- PLAs- micro programmed controls- control signals- micro instructions – Micro program sequencing- branch address modification- pre fetching of micro instructions.
Module 3
Memory organization- semi conductor RAM memories- internal organization- bipolar and MOS devices- dynamic memories- multiple memory modules and interleaving- cache memories -mapping functions – replacement algorithms- virtual memories- address translation-page tables – memory management units- secondary memories- disk drives- standards.
Memory organization- semi conductor RAM memories- internal organization- bipolar and MOS devices- dynamic memories- multiple memory modules and interleaving- cache memories -mapping functions – replacement algorithms- virtual memories- address translation-page tables – memory management units- secondary memories- disk drives- standards.
Module 4
Input-Output organization- accessing I/O devices- direct memory access (DMA)- interrupts and interrupt handling- handling multiple devices- device identification- vectored interrupts- interrupt nesting- daisy chaining- I/O interfaces- serial and parallel standards- buses-scheduling- bus arbitrations- printers- plotters- VDUs.
Input-Output organization- accessing I/O devices- direct memory access (DMA)- interrupts and interrupt handling- handling multiple devices- device identification- vectored interrupts- interrupt nesting- daisy chaining- I/O interfaces- serial and parallel standards- buses-scheduling- bus arbitrations- printers- plotters- VDUs.
Module 5
Introduction to parallel processing and architecture- classification- array processors- pipeline architecture- interconnection- networks- multistage networks- message passing architecture.
Introduction to parallel processing and architecture- classification- array processors- pipeline architecture- interconnection- networks- multistage networks- message passing architecture.
mgu university b.tech syllabus
References
1. Computer organization – Hamacher C V, Mc Graw Hill.
2. Computer Systems and Architecture – Vincent P Heuring, H F Jordan, Pearson Edn.
3. Computer organization and Design – Pal Choudhary
4. Computer organization and Architecture – Hayes J P
5. Computer Org. & Architecture: Stallings, Pearson Education.
2. Computer Systems and Architecture – Vincent P Heuring, H F Jordan, Pearson Edn.
3. Computer organization and Design – Pal Choudhary
4. Computer organization and Architecture – Hayes J P
5. Computer Org. & Architecture: Stallings, Pearson Education.