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Sem 6 - COMPUTER ORGANISATION

MG University S6 Electrical and Electronics (EEE) B.Tech  Syllabus

Module 1
Introduction: Functional block diagram of digital computer – processor
organization – typical operation cycle: fetch, decode and execute –
microprogrammed Vs hardwired control (basic concepts only) – bus structures.

Module 2
Arithmetic and Logic unit: Adders- serial and parallel adders- fast adders- carry
look ahead adder- 2’s complement adder/subtractor- multiplication and division
operations (description using block schematic diagrams only)-design of Logic
unit-one stage ALU.

Module 3
Memory System: memory parameters – main memory – cache memory –
auxiliary memory – semiconductor RAM – Static RAM –Dynamic RAM – ROM –
PROM – EPROM – E2 PROM – Flash Memory.
Programmable Logic Devices: PAL, PLA, FPLA, Applications.

Module 4
Memory Organisation: Internal Organisation of memory chips – cache memory –
mapping functions – direct mapping – associative mapping – set associative
mapping – memory interleaving – Hit and miss – virtual memory – organization –
Address translation.

Module 5
Input/Output Organisation: access to I/O Devices – Interrupts – Enabling and
Disabling of Interrupts – Handling multiple devices –Buses – Synchronous and
Asynchronous buses.

Data Communication interfaces and standards: parallel and serial ports – RS232,
RS423 serial bus standards –GPIB IEEE488 Instrumentation bus standard- PCI,
SCSI, USB (basic ideas only).

References

1. Computer Organisation: V. Hamacher – Mc Graw Hill
2. Logic and Computer Design Fundamentals: M. Morris Mano
3. 2/e Pearson Computer Organisation and Design: P. Pal Chaudhari – PHI
4. Digital Computer Fundamentals: Thomas Bastee